The invention disclosed and claimed herein pertains generally to memory expansion apparatus for a data processing system which employs a mini computer having the capability to address no more than a maximum amount of stored information, even though useful system operation requires that the mini computer be able to access a much greater amount of information. More particularly, the invention pertains to apparatus for use in a system which processes data in real time, wherein it is important to avoid time delay, while at the same time effectively expanding information storage capacity beyond the amount which can be addressed by a mini computer employed by the system.
In various types of digital data processing systems it has been found that mini computers may be employed to achieve substantial reductions in cost and space. For example, a system to be deployed aboard ships of the United States Navy, where cost and space limitations may be critical, advantageously includes a V-76 Varian mini computer. This system is being provided to allow classification of certain types of targets by detecting and receiving pertinent information from target environment, it being necessary to process received information in real time.
However, a drawback in the use of a mini computer is that, due to its internal or inherent structure, the mini computer may be incapable of addressing all of the information storage locations included in a very large memory. At the same time, use of the large memory may be necessary to provide all of the information storage capacity which is required by a system employing the mini computer. For example, the above Navy system requires a memory having the capacity to store 128K digital words of 16-bit length. At the same time, the Varian V-76 mini computer has the capability to address no more than a 32K 16-bit memory, or memory having 32K discrete storage cells or locations.
In the past, to expand the memory available to a mini computer, beyond its addressing capability, devices known as memory maps have been used. However, such memory maps may cost on the order of $3000-$5000 and may require substantial power, such as five volts at 17 amperes current. Also, the use of a memory map in a mini computer system usually causes a substantial complication of the software to be used by the system.
In addition to the above disadvantages, a memory map used with a mini computer system for memory expansion causes the operation of the system to be delayed by 200-300 nanoseconds each time the system executes a memory cycle, that is, reads data out of or writes data into a memory storage location. The delay results from the structure of the memory map which requires that, for each request for data from the memory, an address from the mini computer must be processed through a number of decoding steps to provide a physical address or hardware address, to which the memory will respond. Consequently, if the system executes a very long program, system operation may be delayed on the order of minutes or hours. In the above Navy system, in which it is critical to maintain system operation in real time, that is, to process data as soon as it is detected and received, delays of such magnitude may not be tolerated.